As integrated circuits continue to evolve, the number of voltage and frequency domains is rapidly increasing. With a greater number of voltages and frequency domains, additional circuits must be implemented to accommodate the voltages and frequency domains. More complex timing control circuits are also required to enable the operation of circuits implemented in the various frequency domains.
Further, as transistors get smaller and faster, the metal conductors of an integrated circuit are not able to transfer signals fast enough in response to the faster transistor speeds. While conventional circuits may implement wider and taller conductors to increase speed, such conductors introduce other problems when implementing a circuit, such as increased capacitance or delay. Another solution to increase speed is to pipeline the data by inserting flip flops in interconnects, thereby increasing the throughput. However, such pipelining structures result in significant clock loading.
In devices having programmable resources, a significant amount of interconnects is required for programmability. Further, conventional integrated circuit devices which enable synchronous communication have high area overhead to provide the necessary clock signals. Such clocking structures also require circuits to account for skew in the communication of data over various paths in the circuit.